| ▲ | Melatonic 5 hours ago | ||||||||||||||||||||||||||||||||||
Intel just bought a ton of ASML's most advanced machines (way more than TSMC) so theoretically they should be able to manufacture stuff on an equivalent node or better. And given the kind of performance and battery life we have seen from their latest chips they definitely seem to be back in the game | |||||||||||||||||||||||||||||||||||
| ▲ | aurareturn 4 hours ago | parent | next [-] | ||||||||||||||||||||||||||||||||||
Do you have a source of how many total EUV machines Intel bought and TSMC bought in the last 1-2 years? Yes, Intel made the first purchase for High NA EUV machines. That's largely because they were so far behind TSMC, they took a big risk as the first adopter for High NA EUV with their upcoming 14A node to try to catch up. TSMC thinks it can keep using low NA EUV machines for N2 and A14 nodes even if they have to increase the number of patterning steps. This also means TSMC will likely keep all the AI chip design wins since High NA has half of the reticle size of low NA. The maximum chip size of High NA is half of low NA. This is a major deal for AI chips because they tend to want to be as big as possible. None of these things mean Intel bought more total EUV machines than TSMC. A quick internet search says TSMC has about 2x as many fabs in active construction as Intel. | |||||||||||||||||||||||||||||||||||
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| ▲ | aurareturn 4 hours ago | parent | prev | next [-] | ||||||||||||||||||||||||||||||||||
Panther Lake on 18A is less efficiency than Lunar Lake on N3B released in 2024.https://www.notebookcheck.net/Intel-Panther-Lake-Core-Ultra-... | |||||||||||||||||||||||||||||||||||
| ▲ | ahartmetz 5 hours ago | parent | prev [-] | ||||||||||||||||||||||||||||||||||
"Big if true". That's surprising. More ASML machines = more capacity in the future. Do you have a source for that? Intel would need to have lots of (and / or very big) customers lined up or big plans to manufacture possibly more than CPUs of their own design to make use of that capacity. | |||||||||||||||||||||||||||||||||||
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