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Aurornis 4 hours ago

> The one thing I will say, is that my experience of hardware engineers is very gatekeepy.

Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.

You also need to understand the history of autorouting technology for PCBs. Autorouters with auto layout have been around in many forms for years. Their output never compares to a skilled EE doing it manually. The gap between autorouter output and skilled operator output is even bigger than the gap between a good developer and average AI codegen slop.

I’m interested in this space, but even the Fable/Astra or dedicated tools like Quilter, Flux, and others have a very, very long way to go for boards more complex than simple hobby boards.

I do think this is going to be good for hobby people doing simple PCBs though

stonogo 3 hours ago | parent | next [-]

> Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.

Where are these communities?

Joel_Mckay 4 hours ago | parent | prev [-]

NP-hard problems are still NP-hard even with magical LLM pixie sprinkles. =3

Aurornis 3 hours ago | parent | next [-]

If the magic LLM pixie sprinkles can brute force their way to a solution using viable heuristics and their training data, I will use them.

Joel_Mckay 2 hours ago | parent [-]

NP-Hard is NP-hard... "heuristics" in this case is just a euphemism for a fantasy cost-function to scam shareholders.

It is a named problem, and can't be misappropriated like the $9Tn worth of FOSS code "AI" scraped and compacted for isomorphic plagiarism tokens. =3

bluGill an hour ago | parent | next [-]

The best solution might be NP-hard. However we don't need the best, we need one that is good enough, and that is more doable.

28 minutes ago | parent [-]
[deleted]
monocasa an hour ago | parent | prev [-]

So, then how are today's pcb layout techs solving these Np-hard problems in your mind, armed only with Altium?

Joel_Mckay an hour ago | parent [-]

Only decades of standards compliance, workmanship training, and experience. Human beings are very good at spotting patterns in noisy jungles, and making rational design tradeoffs.

Auto-routers have been around far longer than even smartphones. Somewhat functional in the trivial problem domains, and always useless where design choices mattered.

Best of luck solving a named problem. =3

officialchicken 3 hours ago | parent | prev | next [-]

Magical LLM pixie sprinkles ... is that where magic smoke comes from?

Joel_Mckay 2 hours ago | parent [-]

Magic smoke is important, as it indicates a design parameter was exceeded.

I often recommend folks get a mini thermal camera for their phone... as inspecting for issues in electrical, hydraulic, or mechanical systems gets a fair bit easier/safer. =3

monocasa 3 hours ago | parent | prev [-]

They're also NP-hard for the humans doing the majority of the work currently, meaning that good enough heuristics dominate as it is.

Joel_Mckay 3 hours ago | parent [-]

Every trace on a PCB is a traveling salesman problem with ballooning complexity.

https://en.wikipedia.org/wiki/Travelling_salesman_problem

While physics informed models do exist, they are still going to burn a lot of compute to generate failure modes people didn't know were possible. =3

https://www.youtube.com/watch?v=T4Upf_B9RLQ

monocasa an hour ago | parent [-]

Well, no, it's not.

If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.

Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.

And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.

Joel_Mckay an hour ago | parent [-]

>Traces being, say 20% longer than they need to be doesn't really change the performance of the board

Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.

Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:

https://www.qorvo.com/design-hub/calculators-simulation/qspi...

>the industry doesn't look for optimal, only good enough

Indeed, that is why your iPhone still weighs 3.7 kg. =3

monocasa an hour ago | parent [-]

> Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.

Pretty much every high end board is designed under Altium. QSpice is a different tool for a different purpose.

And like I said, those few cases were the length actually matters tend to be heavily assisted with automation as it is.

> Indeed, that is why your iPhone still weighs 3.7 kg. =3

I guarantee you that an iPhone board isn't an optimal solution, simply good enough.

Joel_Mckay 37 minutes ago | parent [-]

>I guarantee you that an iPhone board isn't an optimal solution,

DFM almost certainly guarantees an iPhone is both form, and cost optimized. Jobs was very clear early on in the product development that the EE work had to be miniaturized due to the energy density possible setting volumetric minimums on the battery technology at that time.

> simply good enough.

A common philosophy for people that make cost optimized low-end products. Some people love their 3.7kg phone, as it comes with a stylish shoulder strap. =3