Every trace on a PCB is a traveling salesman problem with ballooning complexity.

https://en.wikipedia.org/wiki/Travelling_salesman_problem

While physics informed models do exist, they are still going to burn a lot of compute to generate failure modes people didn't know were possible. =3

https://www.youtube.com/watch?v=T4Upf_B9RLQ

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monocasa an hour ago | parent [-]

Well, no, it's not.

If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.

Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.

And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.

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Joel_Mckay an hour ago | parent [-]

>Traces being, say 20% longer than they need to be doesn't really change the performance of the board

Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.

Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:

https://www.qorvo.com/design-hub/calculators-simulation/qspi...

>the industry doesn't look for optimal, only good enough

Indeed, that is why your iPhone still weighs 3.7 kg. =3

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monocasa an hour ago | parent [-]

> Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.

Pretty much every high end board is designed under Altium. QSpice is a different tool for a different purpose.

And like I said, those few cases were the length actually matters tend to be heavily assisted with automation as it is.

> Indeed, that is why your iPhone still weighs 3.7 kg. =3

I guarantee you that an iPhone board isn't an optimal solution, simply good enough.

	▲	Joel_Mckay 37 minutes ago \| parent [-]
		>I guarantee you that an iPhone board isn't an optimal solution, DFM almost certainly guarantees an iPhone is both form, and cost optimized. Jobs was very clear early on in the product development that the EE work had to be miniaturized due to the energy density possible setting volumetric minimums on the battery technology at that time. > simply good enough. A common philosophy for people that make cost optimized low-end products. Some people love their 3.7kg phone, as it comes with a stylish shoulder strap. =3