If they said "pipes" network admins probably would have given it a pass.

They license the IP that they design. They design complete chips you can buy and go right to tape out with no changes if you want.

And how did that IP portfolio come into existence? Did it suddenly materialize out of thin air or… did ARM engineers design it?

I’m going to give you the benefit of the doubt: in your mothertongue, the meaning of “design” is not as broad as in English?

Really?! Did you read the announcement? C1 ultra cores are designed by ARM.

>The biggest cores on the the Xring O3 are the C1-Ultra. C1-Ultra really powerful cores. They support SME2 (Scalable Matrix Extension 2) for matrix/AI acceleration, SVE2 for data parallelism (SIMD).

>https://www.arm.com/products/silicon-ip-cpu/c1-ultra

ARM does the design. What are u talking about?

Below is some additional detail about the processor. Like the parent comment notes, ARM licenses IP of an ISA or core designs (see ARM C1-Ultra cores [0]), licensees like Qualcomm then make specific SoC for different use-cases.

  Xiaomi has made the XRING 03 boast a larger die size than the XRING 01, 
  measuring 133mm² compared to its predecessor’s 109mm² dimensions This change 
  was deemed necessary as the flagship SoC features 16MB of SLC cache, not to 
  mention a new “6 + 4” CPU cluster that comprises two ARM C1-Ultra cores 
  running at 4.35GHz, four C1-Premium cores operating at 3.68GHz and lastly, 
  four C1-Pro cores running at 3.15GHz. [1]

1. https://wccftech.com/xiaomi-xring-03-official-tsmc-3nm-n3p-l...

You are misunderstanding, and, they are not downplaying.

A revision or other reply would benefit from explaining how their value chain x location correspondence is wrong - perhaps missing a step?

Though, in anticipation of a revision, I wonder if its simple as you thought the cores were custom-designed by Xiaomi instead of standard ARM.