| ▲ | Rust SIMD on the GPU(vectorware.com) |
| 42 points by sagacity 2 hours ago | 12 comments |
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| ▲ | 6r17 26 minutes ago | parent | next [-] |
| My heard hurts - i was stupid enough to think that SIMD was a CPU only thing - I don't understand why it would be ported to GPU - huge kudos to managing to surprise me |
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| ▲ | chlorion 3 minutes ago | parent | next [-] | | GPUs work on vectors and matrices very often, that's what they are good at, so it makes a lot of sense that they can operate with SIMD I think! | |
| ▲ | hingler36 18 minutes ago | parent | prev [-] | | Welcome to the lucky 10,000! SIMD is actually a pretty integral part of how GPUs are able to work efficiently, it's part of why there's such a strong focus on branchless programming in the field. |
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| ▲ | LegNeato an hour ago | parent | prev | next [-] |
| Author here, AMA. |
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| ▲ | lbhdc 18 minutes ago | parent | next [-] | | What is vectorware's business model? Are you planning to sell support/consulting to companies using your stack? Or are you looking to sell licenses to your tool? Or something else? | |
| ▲ | jcranmer 39 minutes ago | parent | prev | next [-] | | The post is kind of vague on the IR you're targeting. Can you give some examples of what the SIMD-ized IR looks like, and how it maps to the target PTX? | | |
| ▲ | the__alchemist 35 minutes ago | parent [-] | | I'm confused too. How does this fit between these approaches for paraellization: - CUDA kernels and Tiles (e.g. Cudarc, cuda-oxide, rust-gpu etc) - SIMD on the GPU. (E.g. as in the title...)
- CPU SIMD using avx or SSE instructions (And probably thin wrappers for vectors so you can have sane syntax). Or the maybe-upcoming core simd which should abstract over architecture-specific instructions. Magic floats etc which do 4-16 computations at once, but are a bit clumsy to work with
- Rayon thread pools - arbitrary parallel computations, including SIMD, one per CPU core.
It looks like from the code samples like maybe a cleaner syntax for writing code on the GPU than CUDA kernels? E.g. without mucking with serialization, host and device by abstracting over it? And inspired by core::simd. (Good choice if so, in the interest of standardizing on syntax; I did this for my x86 SIMD vector/quaternion lib as well) |
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| ▲ | lbhdc 23 minutes ago | parent | prev [-] | | This is really cool! It sounds like y'all have a compiler fork that you are using to make this work. I wanna tinker with this, is your compiler available? |
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| ▲ | efnx an hour ago | parent | prev | next [-] |
| Congrats to the Rust-GPU folks! Nice to see the good work flowing. |
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| ▲ | rust-lang 16 minutes ago | parent | prev | next [-] |
| Good job! |
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| ▲ | the__alchemist 24 minutes ago | parent | prev [-] |
| Hey - this is probably off-topic/meta, but what is going on with the comments here? Is it bots? |
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