Unlike marketing terms, "nm density" is actually useful measure.

It describes density measure where you can compare it to planar transistors from the 28-nanometer (28 nm) node around 2010 to 2011 and before. A "0.7 nm" node has equivalent transistor density as if we could have shrunk standard flat transistor node down to 0.7 nanometers.

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6 hours ago | parent | next [-]

[deleted]

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jayd16 6 hours ago | parent | prev | next [-]

Why not use something absolute, like nand-gates per volume?

	▲	u1hcw9nx 4 hours ago \| parent \| next [-]
		Transistor density in units of MTr/mm. (Million Transistors per square mm) is also used. The formula is MTr/mm = 0.6×(NAND2 Tr Count)/(NAND2 Cell Area) + 0.4×(Scan Flip Flop Tr Count)/(Scan Flip Flop Cell Area)
	▲	mikepurvis 6 hours ago \| parent \| prev [-]
		I am not a chip designer, doesn't area matter way more than volume? Vertical space is basically free; it's horizontal space that is at a huge premium.

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measurablefunc 7 hours ago | parent | prev | next [-]

Density is mass per volume so how are you comparing it to a planar transistor? Your units don't even match.

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gruez 7 hours ago | parent | next [-]

Not all densities is mass per volume. eg. population density.

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measurablefunc 6 hours ago | parent [-]

It's a physical quantity per some unit of spatial measurement so the units still don't match up b/c in one case the transistors are stacked per volume & in the other case per area.

> Historically, "node" sizes (like 28nm or 7nm) directly correlated to the physical length of a transistor's gate. Today, names like 3nm or 2nm reflect a marketing generation. The actual transistors are significantly larger than these nanometer labels, meaning density varies between companies

> Research organizations like IEEE have proposed new metrics, such as transistors per cubic millimeter (MTr/mm^3), to accurately map future 3D scaling. However, commercial chip foundries resist this change because it would make it harder to calculate commercial yields and thermal density limits using standard industry formulas.

https://share.google/aimode/Z5BqUjlZWFNphm6Z6

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formerly_proven 5 hours ago | parent [-]

> It's a physical quantity per some unit of spatial measurement so the units still don't match up b/c in one case the transistors are stacked per volume & in the other case per area.

"Planar" and "3D" in this context refers to the shape of the transistors themselves. In a planar transistor the functional structure is spread out in the area, like this: https://en.wikipedia.org/wiki/File:MOSFET_functioning_body.s... while 3D transistors spread into the volume: https://en.wikipedia.org/wiki/Multigate_device#/media/File:D...

However the active devices are still just one layer. This isn't like 3D NAND where you actually have transistors on top of each other. So the comparison only considers the area for both kinds of transistors.

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measurablefunc 5 hours ago | parent [-]

In any case, I got the answer from the AI I was looking for & it makes sense. You can try to map the volumetric density to areal density but the mapping is not canonical so it doesn't say anything about the physical reality of actual transistor density since the reality is that it is a volumetric measure that gets fudged for marketing purposes.

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roetlich 4 hours ago | parent [-]

Well, this seems like a very dangerous way of using AI. If you keep pushing until you get back an answer that makes sense to you, you might just get your own believes fed back to you.

	▲	measurablefunc 3 hours ago \| parent [-]
		Fortunately for you I put even less weight on opinions of internet strangers so there is no danger here for anyone.

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john_strinlai 6 hours ago | parent | prev | next [-]

density is quantity per unit measure.

mass per volume is one example.

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bronson 7 hours ago | parent | prev | next [-]

https://en.wikipedia.org/wiki/Transistor_count#Transistor_de...

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amirhirsch 6 hours ago | parent | prev [-]

Density is this reply.

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Smalltalker-80 6 hours ago | parent | prev [-]

Yeah, the actual sizes are right there in the pictures, and never < 1 nm.