Why not use something absolute, like nand-gates per volume?

Transistor density in units of MTr/mm. (Million Transistors per square mm) is also used. The formula is

MTr/mm = 0.6×(NAND2 Tr Count)/(NAND2 Cell Area) + 0.4×(Scan Flip Flop Tr Count)/(Scan Flip Flop Cell Area)

I am not a chip designer, doesn't area matter way more than volume? Vertical space is basically free; it's horizontal space that is at a huge premium.