| ▲ | johnbender a day ago | |||||||
FM day job: Interpretation of SysML activity diagrams as temporal logic for use with state machine specifications. Module system for state machine with scoping, ownership type system and attendant theorems to carry proofs of LTL properties about individual parts forward after composition. | ||||||||
| ▲ | 4b11b4 a day ago | parent [-] | |||||||
Wait what..? please elaborate or provide any references for further reading! | ||||||||
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