It would destroy the Z80. It's a 32bit, dual core CPU running at 133MHz. Even single cored it'll thrash a Z80. Heck, I bet you could create a drop-in replacement board for the Z80 using an RP2040.

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PaulHoule 4 hours ago | parent | next [-]

Note it was possible to use a Z80 to function as a display controller, people used to do it back in the day...

https://archive.org/details/Cheap_Video_Cookbook_Don_Lancast...

	▲	TapamN 7 minutes ago \| parent [-]
		The Galaksija computer used it's Z80 to help generate the video signal. I'm not sure how its implementation compares to your link. https://en.wikipedia.org/wiki/Galaksija_(computer) https://media.ccc.de/v/29c3-5178-en-the_ultimate_galaksija_t...

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zahlman 3 hours ago | parent | prev | next [-]

Yes, I understand that, but I wonder about the multiple (obviously there is more to it than clock speed). I chose the Z80 because of its long-standing reputation.

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ge96 5 hours ago | parent | prev [-]

Crazy what you can buy nowadays like the Teensy 4.0 with 600MHz base clock

Granted that's $20 not $1

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MPSimmons 4 hours ago | parent | next [-]

My sweet spot of choice between power and price is the ESP32 S3 (2x core @ 240mhz) at ~$6 per board, but yeah, the power to dollar ratio is crazy these days, across the board. And they are absolutely tiny and sip power if you write the code well.

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fortran77 4 hours ago | parent | prev [-]

The key here is the "PIO" which you won't find on a Teensy. It lets you do extreme "bit banging" tricks including generating video. People have even implemented Ethernet on it. I've used it for some custom serial protocols ("Weigand") used by alarm panels.

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ge96 4 hours ago | parent [-]

Really I guess I don't know what that is then as I buy the Teensy since it has so much IO, multiple UART, multiple I2C busses, sd card reading, etc...

edit: interesting

(Teensy | Pico)

Special Features: CAN Bus (3x), SDIO, S/PDIF | PIO (Programmable I/O) (8 SMs)

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fortran77 an hour ago | parent [-]

The Pico PIO has an instruction set and can be programmed.

You write PIO assembly that runs autonomously on a state machine, with explicit timing (e.g., out, in, set, mov, jmp, wait) and cycle‑accurate interfaces. The CPU communicates via small FIFOs, and interrupts are optional; the PIO can be “fire‑and‑forget” for many protocols.

	▲	ge96 an hour ago \| parent [-]
		That's cool, I'm not at that level right now, side note I bought an FPGA like 5 years ago and still haven't used it.