I have increasingly negative things to say about this.

There is (so far) nothing 'open' about RISC-V. and I wonder if there really ever was any desire for it, at this point.

This whole "Open ISA" crap appears to be a thin veneer to funnel quite large sums of investment into an otherwise completely proprietary and locked-down environment that could never harm the incumbents in any meaningful way - while still maintaining just enough of a pretense of open source, that the (regrettably myself included) shallow nerds and geeks could get smitten by it.

Where is the RTL? Where are the GDSII masks? Why am I unable to look at the branch predictor unit in the Github code viewer? Or (God forbid!) the USB/HDMI/GPU IP? I reject the notion that these are unreasonable questions.

I want my SoC to have a special register that has the git SHA ID of the exact snapshot of the repository that was used to cook the masks. that, now that - is Open Source. that is Open Computing. And nothing less!

I dont care about the piece of paper with instruction encodings - the least interesting part of any computer!

Wasn't that the whole point? We're more than a quarter of a century in and we're still begging SoC vendors for datasheets. Really incredibly embarassing and disappointing.

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Shugyousha an hour ago | parent | next [-]

> Where is the RTL? Where are the GDSII masks? Why am I unable to look at the branch predictor unit in the Github code viewer? Or (God forbid!) the USB/HDMI/GPU IP? I reject the notion that these are unreasonable questions.

As you note correctly, the ISA is open, not this CPU (or board).

The important point is that using an open ISA allows you to create your own CPU that implements it. This CPU can then be open (i.e. you providing the RTL, etc.), if you so desire

I assume it will be much more difficult (or impossible?) to provide the RTL for a CPU with an AMD64 ISA, since that one has to be licensed. I wonder if you paying for the license allows you to share your implementation with the world. Even if it does, it's less likely that you will do so, given that you will have to pay for the licensing fee and make your money back

Since there is no license to pay for in case of RISC-V, it allows you to open up the design of your CPU without you having to pay for that privilege

	▲	afiori an hour ago \| parent [-]
		My superficial understanding is that arm does not prevent from sharing implementation details of your own design but most chips also license a starting implementation that has such limitations. So the end result is often more restricted than the ISA licence some would require

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ksec an hour ago | parent | prev [-]

Couldn't have said it better. The moments these people promise everything would be free is a massive red flag. Unfortunately it seems most poodle haven't learned the lesson.

	▲	afiori 44 minutes ago \| parent [-]
		It is a free non-copyleft licence, it is the expected result that derivatives are not similarly free