z Series have used both, POWER and TELUM (I and II) processors.

For many years, the 64-bit extension of the original S/360/370/390 architecture was emulated in the software layer via the static binary translation – just like the i Series AS/400 have been doing since the inception, and there was no native S/360 implementation in silicon for a fairly long time.

If my understanding is correct, with TELUM processors, IBM has gone back to implementing the ISA in silicon, although the available details on TELUM are scarce.

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ch_123 a day ago | parent | next [-]

This (and variations) is commonly believed but not the case - IBM's Z hardware has always used processors which natively implement the Z instruction set. I think part of the source of the confusion is a presentation from years ago which showed that some IP is shared between the Z and Power CPUs.

	▲	sillywalk 14 hours ago \| parent [-]
		> a presentation from years ago which showed that some IP is shared between the Z and Power CPUs. The eCLIPz project, for the POWER6 & Z10[0]. "The z10 processor was co-developed with and shares many design traits with the POWER6 processor, such as fabrication technology, logic design, execution unit, floating-point units, bus technology (GX bus) and pipeline design style, i.e., a high frequency, low latency, deep (14 stages in the z10), in-order pipeline. However, the processors are quite dissimilar in other respects, such as cache hierarchy and coherency, SMP topology and protocol, and chip organization."[1] [0] https://news.ycombinator.com/item?id=18494225 [1] https://en.wikipedia.org/wiki/IBM_z10

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nabla9 a day ago | parent | prev [-]

Your understanding is not correct.

IBM z15 mainframes had z15 chip now they have Tellum. z chips are their own line. z14, z13, ...