| ▲ | PaulHoule 6 days ago |
| I thought the PDP 10 had 6-bit bytes, or at least 6-bit characters https://en.wikipedia.org/wiki/Six-bit_character_code#DEC_SIX... Notably the PDP 8 had 12 bit words (2x6) and the PDP 10 had 36 bit words (6x6) Notably the PDP 10 had addressing modes where it could address a run of bits inside a word so it was adaptable to working with data from other systems. I've got some notes on a fantasy computer that has 48-bit words (fit inside a Javascript double!) and a mechanism like the PDP 10 where you can write "deep pointers" that have a bit offset and length that can even hang into the next word, with the length set to zero bits this could address UTF-8 character sequences. Think of a world where something like the PDP 10 inspired microcomputers, was used by people who used CJK characters and has a video system that would make the NeoGeo blush. Crazy I know. |
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| ▲ | xdennis 6 days ago | parent | next [-] |
| This is what happens when you write articles with AI (the article specifically mentions ChatGPT). The article says: > A number of 70s computing systems had nine-bit bytes, most prominently the PDP-10 This is false. If you ask ChatGPT "Was the PDP-10 a 9 bit computer?" it says "Yes, the PDP-10 used a 36-bit word size, and it treated characters as 9-bit bytes." But if you ask any other LLM or look it up on Wikipedia, you see that: > Some aspects of the instruction set are unusual, most notably the byte instructions, which operate on bit fields of any size from 1 to 36 bits inclusive, according to the general definition of a byte as a contiguous sequence of a fixed number of bits. -- https://en.wikipedia.org/wiki/PDP-10 So PDP-10 didn't have 9-bit bytes, but could support them. Characters were typically 6 bytes, but 7-bit and 9-bit characters were also sometimes used. |
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| ▲ | vincent-manis 6 days ago | parent [-] | | Actually, the PDP-10 didn't have any byte size at all, it was a word-addressed machine. (An early attempt to implement C on this machine came a cropper because of this.) It did have a Load Byte and a Store Byte instruction, which allowed you to select the byte size. Common formats were Sixbit (self-explanatory), ASCII (5 7-bit bytes and an unused bit), and (more rarely, I think), 9-bit bytes. My first machines were the IBM 7044 (36-bit word) and the PDP-8 (12-bit word), and I must admit to a certain nostalgia for that style of machine (as well as the fact that a 36-bit word gives you some extra floating-point precision), but as others have pointed out, there are good reasons for power-of-2 byte and word sizes. | | |
| ▲ | leni536 5 days ago | parent [-] | | > It did have a Load Byte and a Store Byte instruction, which allowed you to select the byte size. Were these instructions atomic regarding interrupts? If not, then these look like shorthands for masking/shifting bit-fields out of words, leaving the word as the smallest atomically addressable unit. | | |
| ▲ | p_l 5 days ago | parent [-] | | They are atomic, indeed. The underlying implementation might have used masking and shifting, especially in bit-slice implementations like KS-10, but as far as operation of the computer was concerned they were atomic. | | |
| ▲ | PaulHoule 5 days ago | parent [-] | | It becomes problematic for multiprocessor systems but you could probably build a communications fabric and memory model that works. My fantasy CPU lets you write to the (say) 15 bits starting at the 43rd but of a 48 bit word which a real CPU would have to do a lot of work to implement but with the right kind of cache it is probably not so bad, it also has an instruction to read a UTF-8 character at a deep pointer and increment the pointer which a real system could satisfy out of the cache except when it can’t. | | |
| ▲ | p_l 5 days ago | parent [-] | | For PDP-10, because it operated only on word values, you can easily assume that every bus and memory operation passes a full 36 bit word every time. In fact, recent-ish x86 CPUs have similar instructions, and as of Zen4 they are fast not just on Intel but also on AMD (previously they were microcoded as a bunch of shifts AFAIK with pretty lousy latency) |
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| ▲ | aidenn0 6 days ago | parent | prev | next [-] |
| The PDP-10 didn't really have bytes; it had 36-bit words. AFAIK only Multics used 4 9-byte characters on the PDP-10s; I believe 5 7-bit ASCII characters fairly common later on in the PDP7/10 lifetime. |
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| ▲ | unused0 5 days ago | parent | next [-] | | Multics ran on Honeywell 6180 and DPS8/M machines. They had 36 bit words like the PDP-10. They also had instructions that would operate o in 6 or 9 bit characters in the word | |
| ▲ | msla 5 days ago | parent | prev [-] | | Multics never ran on PDP-10s, but on other 36-bit mainframes. |
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| ▲ | jacquesm 6 days ago | parent | prev [-] |
| You are correct. The Sperry-Univac 1100 series though did have 36 bit words and 9 bit bytes. |
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| ▲ | Someone 6 days ago | parent [-] | | IIRC, its instruction set supported words (36 bits), half words (18 bits), third words (12 bits), quad words (9 bits), and sixth words (6 bits). For characters, 6 bits also was used at times, for example in its disk format. There, a severely limited character set wasn’t problematic. | | |
| ▲ | Narishma a day ago | parent | next [-] | | > quad words Shouldn't that be quarter words? Quad means quadruple. | |
| ▲ | jacquesm 6 days ago | parent | prev [-] | | The later versions (1100/60 and later) had loadable microcode. This allowed for some pretty nifty emulation options. |
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