Nice try but Verilog is not real hardware. I hate projects like that - you didn't produce new cpu- you just emulate it.

Build it and then I would be fan number 1!

True, just writing some SystemVerilog that can be simulated does not guarantee working hardware. The OP does point out that he took it all the way to a netlist targeting a real hardware library. Place and route and actual fabrication, or building it for an FPGA and testing there are still needed to fully prove the design, but if the synthesis tools he used are reliable then there's not a lot of room for it to fail at this point. The clock speed is based on the netlist only, so it'll probably not be that fast after actual place and route, so it'll probably have to be clocked a little slower than 500 MHz, but it should work

I'm not sure what you consider real. Verilog or System Verilog is used industry wide to describe hardware that then becomes chips.

YoU wOuLdN'T dOwNlOaD a CpU!1!!

Who hurt you? This is a fantastic project with effort put into simulating the RTL against a PDK. I don’t understand why you would gate your approval. If someone showed off a game on HN would you say it wasn’t a real game until you could buy it at your local Best Buy or GameStop?