It’s intentional product segmentation. Just like Intel not shipping ECC for client SKUs when DDR5 design makes it really necessary.

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asdff 5 hours ago | parent | next [-]

Off topic but doesn't intel do something weird where some i3 chips can use ecc but not i5 or i7 until you get into server chips? I remember seeing that when plotting nas builds a couple years ago. Should have pounced on actually building it then....

	▲	ComputerGuru 3 hours ago \| parent \| next [-]
		Yes, I liked using them for NAS builds. Great for ZFS machines. Intel is weird with their stuff like that, I wrote about how they introduced and then dropped an SHA instruction that could be used to optimize hashing (useful for things like block checksum hashes on storage servers) before: https://neosmart.net/blog/will-amds-ryzen-finally-bring-sha-...
	▲	oynqr 20 minutes ago \| parent \| prev [-]
		Wait until you find out that some lower-tier Intel CPUs can use regular RAM in an ECC mode, albeit losing some capacity and throughput.

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close04 8 hours ago | parent | prev [-]

> Just like Intel not shipping ECC for client SKUs when DDR5 design makes it really necessary

The ECC in DDR5 is on-die ECC and that's not "real" ECC, it's what DDR5 needs to not fail. Side-band ECC is the standard method, employing extra memory chips and 72bit memory. OEMs mix these in the marketing materials to fool the users into thinking they buy the better option.

	▲	ComputerGuru 7 hours ago \| parent [-]
		Yes, here I'm referring to actual ECC, not the on-die ECC. All DDR5 chips have on-die ECC as a prerequisite just to reach error levels comparable to standard non-ECC DDR4, but from a hardware analysis perspective, even with the on-die ECC, DDR5 still needs ECC more than DDR4 (which already needed it).