| ▲ | ohazi 4 hours ago | |
4 transistors for a two-input NAND gate in CMOS. | ||
| ▲ | jhallenworld 3 hours ago | parent [-] | |
1 transistor for DTL... certainly CMOS is more relevant. | ||
| ▲ | ohazi 4 hours ago | |
4 transistors for a two-input NAND gate in CMOS. | ||
| ▲ | jhallenworld 3 hours ago | parent [-] | |
1 transistor for DTL... certainly CMOS is more relevant. | ||