| ▲ | imtringued 2 days ago | |
I would argue that the primary use for this type of prototyping is to test analog chip designs, because analog components don't scale down that well. Digital information only needs to distinguish between 0 and 1 but with analog electronics the maximum current or voltage you support grows as you use a bigger area or thicker layers. I personally don't believe that even a $100 service delivering you 1 micron chips could compete against a $10 FPGA unless you are intentionally doing something the FPGA was not designed for like analog electronics or low static power. | ||
| ▲ | throwaway81523 2 days ago | parent | next [-] | |
I don't have the impression that a $10 FPGA can implement the equivalent of an 80386. I can believe it of a $1000 FPGA. I don't know what the right intermediate point would be. But big FPGA's are very expensive, mostly because the customers for such things are well funded. | ||
| ▲ | adrian_b 2 days ago | parent | prev [-] | |
I partially agree with you, in the sense that any useful custom integrated circuit must include some analog part, otherwise it would not be competitive with standard programmable logic. Nonetheless, having actually worked as an analog IC designer, I can assure you that today, and especially when using a CMOS IC process, where the analog devices that are available, like MOSFETs, are inferior to the bipolar junction transistors and junction FETs, which were available in the fabrication processes traditionally used for analog ICs, it is completely impossible to make a competitive analog circuit that is purely analog. Any CMOS analog circuit needs a digital part, even if it is something as simple as an amplifier, and more so for things like a power supply or a motor controller, or something that acquires data from analog sensors. At the minimum, a digital automaton together with a lot of configuration switches is needed to perform the auto-calibration of the analog parts when the IC is powered on. Otherwise, things like differential amplifiers would be unbalanced, bias current sources and amplifier gains would have values very different from those needed for the circuits to work as designed, etc. Digital parts may also implement in a simpler or more reliable way various kinds of control feedback loops and various protections to undesirable conditions, e.g. overcurrents, overvoltages etc. So any useful custom CMOS circuit must be a mixed digital-analog design, i.e. it must include both a digital part, with flip-flops, digital gates and switches, and an analog part, with amplifiers, comparators, analog multiplexers, oscillators, voltage references, etc. An one-micron CMOS process would be especially useful if its component list would include some NMOS transistors with a higher breakdown voltage, of at least 12 V, but preferably even of 20 V, or ideally of 25 V (to have a safety factor if using an 18 V power supply, as required by the gate drivers of some power MOSFETs). An one-micron CMOS IC would likely use 3.3 V for the main power supply, and it should be able to use 5 V at least for I/O buffers. But if some transistors with a higher breakdown voltage would also be available, they could be used for open-drain output buffers that would be tied to an external higher voltage and they could be used to command directly some external power MOSFETs, without an intermediate gate driver. A standard 5 V I/O buffer could command directly an external GaN HEMT (gallium nitride switching transistor), but presumably the output current of the buffer would be low, so the switching of the external transistor would be slow in comparison with using an additional gate driver IC. | ||