interesting to be reminded that an 8080 (8 bit datapath) took 4,800 transistors

an Apple M5 Max is 100,000,000,000 transistors (ok it’s 18 CPU + 40 GPU cores) by comparison so 17 million 8080 equivalents

▲

Someone 2 hours ago | parent | next [-]

> so 17 million 8080 equivalents

At, ballpark, 1000 times the clock frequency. It’s a pity we do not how to connect such a large number of tiny cores in a way so that it can perform meaningful work. One hurdle is that, even ignoring the insane amount of connections needed, it would not be possible to connect each of those cores to each other one because their address spaces are so tiny.

	▲	librasteve 2 hours ago \| parent [-]
		yeah, i have the notion that a grid would be good enough

▲

dofm 4 hours ago | parent | prev | next [-]

The ARM 1 only had 25,000 or so.

▲

librasteve 4 hours ago | parent [-]

wonders how ARM did that - the MIPS R2000 came in at ~115k and the 80286 ~134k

anyway - say you want 50% of the transistors for on chip RAM these days, then thats

100 billion / 50 thousand = 2 million ARM 1s

clocking at say 3GHz

6e15 MIPS = 6 peta MIPS

so if you could run code on it, you would get a 10,000x speed up ;-)

	▲	tyingq 4 hours ago \| parent \| next [-]
		A fairly deep dive into it https://www.righto.com/2015/12/reverse-engineering-arm1-ance...
	▲	icelusxl 37 minutes ago \| parent \| prev [-]
		ARM1 has no cache memory, no hardware multiply and division, no MMU and no cache.

▲

dosisking 4 hours ago | parent | prev | next [-]

This is understandable, considering that the M5 is the Ultimate Computer, powered by Dr. Richard Daystrom's very own engrams

	▲	ThrowawayR2 2 hours ago \| parent \| next [-]
		But the M5 is clearly not safe to use in Enterprise¹ computing environments. ¹ USS Enterprise, that is.
	▲	librasteve 4 hours ago \| parent \| prev [-]
		excellent point

▲

TacticalCoder 4 hours ago | parent | prev | next [-]

Yup and Moore's law about transistors doubling every 18 to 24 months did basically hold, which is even more impressive.

Foreseen it was.

▲

flohofwoe 4 hours ago | parent | prev [-]

Nitpicking, but since the M5 includes cache and GPU a more realistic comparision would probably be to count all transistors in an entire 8-bit home computer system against a modern integrated GCPU (e.g. from googling around a C64 might have around 0.75 million transistors, most in the memory chips).

And in a way, those old 8-bit home computers also worked like a single integrated 'super-chip', because the whole system was driven by a single clock and entirely 'hard realtime', while modern computers are much more asynchronous (and I guess this asynchronous design is what enabled most performance improvements that go beyond pure transistor count scaling).