| ▲ | snek_case 2 hours ago | |
The weights are very unlikely to be on the chip itself. That wouldn't work for SOTA models that are terabyte scale, even quantized. This is probably an accelerator for specific kernels in the model, but the weights are likely loaded from memory. The chip may have SRAM to store some of the weights temporarily during inference. | ||
| ▲ | foltik an hour ago | parent [-] | |
At least in the case of Taalas the weights are physically encoded directly on the chip. It’s composed of 4-bit multiplier cells that compute all 16 possible results in parallel. The top metal wiring layer physically selects the one that corresponds to a multiplication with that cell’s constant weight, and routes it to the next layer. | ||