| ▲ | snvzz 6 hours ago | |
Easier than ever, with RISC-V Vector (RVV), which is part of RVA23. | ||
| ▲ | saagarjha 3 hours ago | parent [-] | |
I don’t think any of this really reaches to the level of individual SIMD implementations in hardware | ||
| ▲ | snvzz 6 hours ago | |
Easier than ever, with RISC-V Vector (RVV), which is part of RVA23. | ||
| ▲ | saagarjha 3 hours ago | parent [-] | |
I don’t think any of this really reaches to the level of individual SIMD implementations in hardware | ||