| ▲ | random3 5 hours ago | |
Can you elaborate on > But it also allows for a lot of hardware to be locked down just like ARM | ||
| ▲ | Joel_Mckay 4 hours ago | parent | next [-] | |
Many of the underlying IP areas of RISK-V advanced features are not public implementations. Yet there are still a lot of great projects around, that may end up in China grey market chip fabs (C950) at some point. https://github.com/vortexgpgpu/vortex ARM64/AArch64 is about constrained consistency, but most RISCV standards groups still fail to recognize their ISA version fragmentation was a serious mistake. So no, it won't exist outside niche use-cases until the kids stop arguing over what RISCV even means in a general end-user context (BOOM flags, RVA23, etc.) =3 | ||
| ▲ | not-a-llm 4 hours ago | parent | prev [-] | |
[dead] | ||