That's mildly surprising to me, given what I've seen when I ask current models to make an SVG of something.

Would I be on the right track if I guessed there's a DSL for designing PCBs that would help enforce functional correctness?

A lot of human PCB errors could be caught by analyzing the netlist against requirements and knowledge of the datasheet. Schematic and board formats are usually plaintext, so you can generate those directly even. Or kicad + python?

That’s probably enough for an LLM to check if you’ve mis-wired something, missed a part or chose the wrong resistor to set a regulator voltage. Plus good old DRC/ERC. If you pass all of those, there’s a good chance things will work unless your placement is really bad, but you could manually lay out and autoroute a lot of simple boards. Not to belittle the parent but a 4 layer board is actually simpler in some ways because you have a power plane which is one less net to worry about.

For analog work you can even run a SPICE simulation.