> TMDs

= Transition Metal Dichalcogenides

> BEOL

= Back End Of Line. The later stages of semiconductor manufacturing (after the standard CMOS logic transistors) e.g. adding the metal wiring and interconnect layers. Think end of a manufacturing line.

The core concept is to layer multiple non-standard non-silicon memory transistors above the metal layers.

That sounds like a stunning invention, since I think that alone implies better memory density than current SRAM (ignoring the extra complexity of stacking it above a logic layer).