The latest from Huawei (which is probably the company to watch here) is an idea called "logic folding" which will squeeze more juice out of DUVL by 3D-stacking logic chips.

So far they have announced road maps and benchmarks for their upcoming products using this. A new Kirin-series phone/laptop chip and an Ascend AI accelerator - stated performance comparable to leading US products made with EUVL.

Products are due in August.

HUAWEI Presents the Tau (τ) Scaling Law, Enabling Breakthroughs in Transistor Density and System Performance

https://www.huawei.com/en/news/2026/5/ieee-iscas-tau-scaling

[Shanghai, China, May 25, 2026] Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo from HUAWEI delivered a keynote speech titled "New Semiconductor Path in Practice". In her speech, she presented the Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. This law proposes replacing geometric scaling with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Based on this principle, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems.