I had Opus 4.5 design an LLM inference engine in verilog, including firmware and automated verification a while ago: https://github.com/cpldcpu/smollm.c

It's of course far from optical. But lowering the implementation through the abstraction levels turned out to be extremely powerful.

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smetannik 7 hours ago | parent [-]

Can you suggest some tutorials for Verilog and FPGAs in general?

I have a spare Tang Nano 9k but I don't feel confident about blindly asking Claude to vibecode me a solution and still would like to have at-least a basic level of understanding.

	▲	cpldcpu 5 hours ago \| parent \| next [-]
		hm.. has been quite a while for me. The good thing about the Tang Nano is that it is supported by the Yosys open source toolchain. There are quite a few resources on the web when you search for the combination.
	▲	jared0x90 6 hours ago \| parent \| prev [-]
		the hdlbits course is really good imo