| ▲ | nixon_why69 9 hours ago | |
There is a lot of verilog out there, it's pretty feasible that they had AI assistance writing more to design their chip. It doesn't have to be revolutionary, it could just be AI-assisted design and lined up well enough with their operations for a custom ASIC to be worth it. | ||
| ▲ | KeplerBoy 8 hours ago | parent [-] | |
Also there's some much boilerplate around everything. Writing a testbench with codex is extremely feasible. This is the kind of verifiable feedback loop the agents shine at. | ||