this also adds new registers to operate on (more state) - 1KB more state at least (512b x 16)

It reuses AMX registers, so I think the only new state is the block scale register (1024 bits)?

The fraction of the installed base of x86 CPUs that support AMX is very small (i.e. only a part of the recent Intel server CPUs support AMX, while the other Intel server CPUs, all Intel consumer CPUs and all AMD CPUs do not support AMX).

CPUs with ACE will in most cases replace CPUs that did not support AMX, so all the registers specified by ACE, but not by AVX10 a.k.a. AVX-512 are new.

	▲	24245245t2 4 hours ago \| parent [-]
		From the ISA perspective, bonzini is right: only BSR0/SCALADATA is new.