| ▲ | elevation 2 hours ago |
| Why couldn't a company committed to mask fabrication and wafer fabrication, in concept, perform these steps daily, or several times daily? Multiple prototype designs could be grouped together so multiple customers can realize a new design instance in the same iteration. With an appropriate debug core in the same wafer, designers who'd completed a tape-out could connect to their chip well enough to repeat their design-verification tests on this real hardware, remotely even (no need to physically handle the device 'til you're certain it's working.) Once satisfied, customers could promote their design to be bonded out for installation into their PCB. "Sure thing boss, we'll add an extra USART core to this afternoon's tape out." |
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| ▲ | elictronic 2 hours ago | parent | next [-] |
| Because you are dealing with the physical world where those different designs have different requirements that can conflict. It’s like saying all software is basically the same, why don’t you just abstract it all and run it on these Raspberry Pi’s. You can do that, but it’s going to turn out poorly. |
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| ▲ | monocasa 2 hours ago | parent | prev | next [-] |
| The wafer manufacturing process takes weeks to months after a tape out. |
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| ▲ | elevation 2 hours ago | parent [-] | | Accelerating this process sounds like a good focus for an SBIR (small business innovation research) RFP. | | |
| ▲ | pjc50 2 hours ago | parent [-] | | A fab is not a small business! Part of the delay is really just commercial. Fabs are optimized for utilization - throughput, not latency. A fab operator will prefer to queue up a load of work with as few gaps as possible, and your shuttle service run has to fit in one of the gaps. If you're NVIDIA and you've already booked the fab, there might not be so much delay. But not zero. Nice little backgrounder: https://siliconmasters.co/blogs/our-blog/how-photomasks-for-... | | |
| ▲ | zerohp 7 minutes ago | parent | next [-] | | The time from tapeout to first samples is 3-4 months even for the biggest customers of TSMC. Shorter for a metal only change. | |
| ▲ | elevation 26 minutes ago | parent | prev | next [-] | | > A fab is not a small business! An SBIR is just a cost effective way for the government to put a number of PhDs/engineers to work on a problem. | |
| ▲ | petsfed an hour ago | parent | prev [-] | | Just to buttress and embroider around your point that a fab is not a small business: If there was a realistic way even to go from bare wafers to non-trivial custom chips in a small-batch fashion, you can bet there would be a cottage industry around it. I would love to live in a world where I could manufacture custom silicon as easily as I can manufacture a custom PCB or custom mechanical part. But as it stands, quick-turn, rapid-proto "micro" fabs are obscenely expensive, to the extent that if you aren't absolutely certain you need the performance gains from custom silicon, justified by years of R&D that confirms the inadequacy of a multi-chip solution, then the idea is killed before any layout engineer is contacted. Microfabs are either operated by research institutes, or they're booked solid for years, and basically printing money. |
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| ▲ | bee_rider 2 hours ago | parent | prev | next [-] |
| I sort of expected this to happen with tightly coupled customer-customizable chiplets inside a single package, instead. But it seems that packaging is also better left to Intel and AMD, I guess. |
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| ▲ | jdw64 2 hours ago | parent | prev [-] |
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