| ▲ | defmacr0 5 hours ago | |
In x86, a basic immediate instruction with a 1 Byte immediate value is encoded like this: <op> (1 Byte opcode), <Registers> (1 Byte), <immediate value> (1 Byte) While xor eax, eax only uses 2 bytes. Since there are only 8 registers, meaning they can be encoded with 3 bits, you can pack two values into the <Registers> field (ModR/M). Making mov eax, 0 only take two bytes would require significant changes of the ISA to allow immediate values in the ModR/M byte (or similar) but there would be little benefit since zeroing can already be done in 2 bytes and I doubt that other cases are even close to frequent enough for this to be any significant benefit overall. An actual improvement would be if there was a dedicated 1 Byte set-rax-to-0 instruction, but obviously that comes at a tradeoff where we have to encode another operation differently (probably with more bytes) again (and you can't zero anything else with it). | ||
| ▲ | rep_lodsb 3 hours ago | parent [-] | |
Some other architectures like PDP-11 and 680x0 had a dedicated "clear register" instruction. It could have been added to x86, even as a group of single-byte opcodes with the register encoded in three bits (as with PUSH, POP, and INC/DEC outside of long mode). But the XOR idiom was already established on the 8080 by that point. | ||