I'm still confused about 2.7 because it says that we have to use WL so that "the bit line (BL) connects to the storage element for reading or writing". But the accepted solution connects to the storage element only for writing, not for reading (the capacitor is always connected to the output for reading).

I would think that if you wanted to make it so that the storage element was connected either for reading or for writing by the WL and otherwise disconnected, you would need two transistors, not just one.

Perhaps this was meant to say "for writing either a 0 or a 1"?

2.7 is confusing because you can wire up the bitline and the word line the wrong way around and the tests still pass.