They claim that the chip has an "MMU". But unfortunately this doesn't seem to be a true RISC-V MMU (according to the Sv32 specification) integrated into the CPU core itself, but just a peripheral designed for memory mapped SPI flash and PSRAM. So as far as I understand there is no true process isolation with page faults and dynamic paging.

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volemo 3 hours ago | parent [-]

That’s a shame, it’d be a cool and, afaik, unique feature for this niche.

	▲	Rochus 2 hours ago \| parent [-]
		Maybe Espressif will notice that there are no RV32 chips with MMU so far (at least to my knowledge); we only have 32 bit MCUs or then only 64 bits for the CPUs. Something like Cortex-A7 is missing.