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konradha 4 hours ago

How are FPGAs "bruned into silicon"? Would be news to me that there are ASICs being taped out at CERN

eqvinox 4 hours ago | parent | next [-]

CERN in fact does design custom ASICs for other things: https://indico.cern.ch/event/1115079/contributions/4693643/a...

(Probably not for this here though.)

danparsonson 4 hours ago | parent | prev [-]

Could they.... have someone else do it for them?

samrus 2 hours ago | parent [-]

Glib, but it wont be cost effective at that small scale