"In case it is not already obvious, efficiency and sensibility were not a top priority when working on this project. I am sure there are more efficient flip- flop designs or implementations with fewer transistors, especially by building composite gates that combine NAND and NOR gates, but I don't really care :)"

Hats off to you for just saying "no" to optimizations.

I'd have gone down an optimization rabbit hole, while never finishing the original project.