Don't most people use C++11 atomics now? You have SeqCst, Release, Acquire, and Relaxed (with Consume deprecated due to the difficulty of implementing it). You can do loads, stores, and exchanges with each ordering type. Zig, Rust, and C all use the same orderings. I guess Java has its own memory model since it's been around a lot longer, but most people have standardized around C++'s design.

Which is a slight shame since Load-Linked/Store-Conditional is pretty cool, but I guess that's limited to ARM anyways, and now they've added extensions for CAS due to speed.

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superxpro12 6 hours ago | parent | next [-]

I've taken an interest in lock-free queues for ultra-low power embedded... think Cortex-m0, or even avr/pic.

Things get interesting when you're working with a cpu that lacks the ldrex/strem assembly instructions that makes this all work. I think youre only options at that point are disable/enable interrupts. IF anyone has any insights into this constraint I'd love to hear it.

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loeg 6 hours ago | parent [-]

For ultra low-power embedded, wouldn't a mutex approach work just fine? You're running on a single core anyway.

	▲	dalvrosa 2 hours ago \| parent [-]
		I'm not sure about the single-core scenario, but would love to learn if someone else wants to add something In reality multiple threads for single core doesn't make much sense right?

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loeg 6 hours ago | parent | prev [-]

LL/SC is still hinted at in the C++11 model with std::atomic<T>::compare_exchange_weak:

https://en.cppreference.com/w/cpp/atomic/atomic/compare_exch...