| ▲ | A Verilog to Factorio Compiler and Simulator (Working RISC-V CPU)(github.com) | ||||||||||||||||||||||
| 62 points by signa11 3 days ago | 6 comments | |||||||||||||||||||||||
| ▲ | ur-whale 19 minutes ago | parent | next [-] | ||||||||||||||||||||||
Amazing work, and a fantastic idea, congratulations to the author. I am definitely trying this next week-end! | |||||||||||||||||||||||
| ▲ | skyberrys 5 hours ago | parent | prev | next [-] | ||||||||||||||||||||||
What a wild idea, but it makes sense! I haven't taken the time to get it working. I've heard a lot about Factorio, but I stayed away from it so far. | |||||||||||||||||||||||
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| ▲ | jw1294 2 hours ago | parent | prev [-] | ||||||||||||||||||||||
Truly excellent. | |||||||||||||||||||||||