Remix.run Logo
Raspberry Pi Pico 2 at 873.5MHz with 3.05V Core Abuse(learn.pimoroni.com)
77 points by Lwrless 7 hours ago | 17 comments
moefh 2 hours ago | parent | next [-]

Great stuff.

It wouldn't be surprising if the RP2350 gets officially certified to run at something above the max supported clock at launch (150MHz), though obviously nothing close to 800MHz. That happened to the RP2040[1], which at launch nominally supported 133MHz but now it's up to 200MHz (the SDK still defaults to 125MHz for compatibility, but getting 200MHz is as simple as toggling a config flag[2]).

[1] https://www.tomshardware.com/raspberry-pi/the-raspberry-pi-p...

[2] https://github.com/raspberrypi/pico-sdk/releases/tag/2.1.1

londons_explore an hour ago | parent | prev | next [-]

When pushing clock speeds, things get nondeterministic...

Here is an idea for a CPU designer...

Observe that you can get way more performance (increased clock speed) or more performance per watt (lower core voltage) if you are happy to lose reliability.

Also observe that many CPU's do superscalar out of order execution, which requires having the ability to backtrack, and this is normally implemented with a queue and a 'commit' phase.

Finally, observe that verifying this commit queue is a fully parallel operation, and therefore can be checked slower and in a more power efficient way.

So, here's the idea. You run a blazing fast superscalar CPU, well past the safe clock speed limits that makes hundreds of computation or flow control mistakes per second. You have slow but parallel verification circuitry to verify the execution trace. Whenever a mistake is made, you put a pipeline bubble in the main CPU, clear the commit queue, you put in the correct result from the verification system, and continue - just like you would with a branch misprediction.

This happening a few hundred times per second will have a negligible impact on performance. (consider 100 cycles 'reset' penalty, 100*100 is a tiny fraction of 4Ghz)

The main fast CPU could also make deliberate mistakes - for example assuming floats aren't NaN, assuming division won't be by zero, etc. Trimming off rarely used logic makes the core smaller, making it easier to make it even faster or more power efficient (since wire length determines power consumption per bit).

gruturo an hour ago | parent | next [-]

You could run an LLM like this, and the temperature parameter would become an actual thing...

hulitu 10 minutes ago | parent | prev [-]

> if you are happy to lose reliability.

The only problem here is that reliability is a statistical thing. You might be lucky, you might not.

Tepix 3 hours ago | parent | prev | next [-]

Both the RP2040 and the RP2350 are amazing value these days with most other electronics increasing in price. Plus you can run FUZIX on them for the UNIX feel.

sandreas 2 hours ago | parent [-]

Mmh... I think that the LicheeRV Nano has kind of more value to it.

Around 20 bucks for the Wifi variant. 1GHz, 256MB RAM, USB OTG, GPIO and full Linux support while drawing less than 1W without any power optimizations and even supports < 15$ 2.8" LCDs out of the box.

And Rust can be compiled to be used with it...

https://github.com/scpcom/LicheeSG-Nano-Build/

Take a look at the `best-practise.md`.

It is also the base board of NanoKVM[1]

1: https://github.com/sipeed/NanoKVM

geerlingguy 39 minutes ago | parent [-]

I think the ace up the sleeve is PIO; I've seen so many weird and wonderful use cases for the Pico/RP-chips enabled by this feature, that don't seem replicable on other $1-class microcontrollers.

sandreas 20 minutes ago | parent [-]

Wow thanks, this is definetely something I have to investigate. Maybe the Sipeed Maix SDK provides something similar for the LicheeRV Nano.

I'm currently prototyping a tiny portable audio player[1] which battery life could benefit a lot from this.

1: https://github.com/sandreas/rust-slint-riscv64-musl-demo

Palomides 2 hours ago | parent | prev | next [-]

it might actually be better to cool from the bottom, since the pads probably conduct heat better than the chip package material

I bet if you designed a custom board it could do a little better

whiskers 4 hours ago | parent | prev | next [-]

Haha — this was a fun day! It's honestly surprising how robust the RP2350 was under such extreme experimentation. Mike's write-up walks through pushing the core voltages far beyond stock limits and dry-ice cooling to see what the silicon could handle.

Credit where it's due: Mike is a wizard. He's been involved in some of our more adventurous tinkering, and his input on the more complex areas of our product software has been invaluable. Check out his GitHub for some really interesting projects: https://github.com/MichaelBell

Blatant plug: We have a wide range of boards based on the RP2350 for all sorts of projects! https://shop.pimoroni.com/collections/pico :-)

8cvor6j844qw_d6 2 hours ago | parent | prev | next [-]

Interesting post. Curious what can I run on a RPi Pico 2 W since I recently got my hands on it.

crest 4 hours ago | parent | prev | next [-]

This some harmless stupid fun.

nottorp 3 hours ago | parent | prev [-]

Well, hope no one tries to deploy overlocked Raspberry Pi hardware in production... especially for kiosk style applications where they're in a metal box in the sun.

They're unstable enough at stock if taken outside an air conditioned room.

whiskers 2 hours ago | parent [-]

This is about the Raspberry Pi Pico 2 (based on the RP2350), not the original Raspberry Pi.

nottorp an hour ago | parent [-]

And is it better with bad cooling?

whiskers 20 minutes ago | parent | next [-]

Yes.

aaronmdjones an hour ago | parent | prev [-]

It's better with absolutely no cooling. It doesn't even consume (and thus dissipate) 100mW flat-out.