that was then. now, high-end chips are reaching 4,3,2 nm. power savings aren't that high anymore. what's the power saving going from 4 to 2nm?

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monster_truck 10 hours ago | parent | next [-]

+5-20% clockspeed at 5-25% lower voltages (which has been and continues to be the trend) add up quick from gen to gen, nevermind density or ipc gains.

	▲	baq 3 hours ago \| parent [-]
		We can’t really go lower on voltage anymore without a very significant change in the materials used. Silicon band gap yadda yadda.

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10 hours ago | parent | prev [-]

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