| ▲ | Peteragain 6 hours ago | |
Okay they're dead, but I think the interesting thing here is the relationship between hardware and the way mathematicians (potentially) think about problem solving. The established practices massively constrain the solutions we find, but I do wonder what a Turing Machine would look like if FPGAs had been around in 1930. FPGAs keep getting used to implement processors, but using one to make a c interpreter and then using it to run a vision library is probably not the best way to use FPGAs to recognise tanks with a drone. Which is, presumably, what a Zala Lancet is doing with it's FPGA. | ||
| ▲ | mietek 2 hours ago | parent | next [-] | |
Some things have been tried; some things continue to be tried. - Naylor and Runciman (2007) ”The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction using an FPGA”: https://mn416.github.io/reduceron-project/reduceron.pdf - Burrows (2009) “A combinator processor”: https://q4.github.io/dissertations/eb379.pdf - Ramsay and Stewart (2023) “Heron: Modern Hardware Graph Reduction”: https://dl.acm.org/doi/10.1145/3652561.3652564 - Nicklisch-Franken and Feizerakhmanov (2024) “Massimult: A Novel Parallel CPU Architecture Based on Combinator Reduction”: https://arxiv.org/abs/2412.02765v1 - Xie, Ramsay, Stewart, and Loidl (2025) “From Haskell to a New Structured Combinator Processor” (KappaMutor): https://link.springer.com/chapter/10.1007/978-3-031-99751-8_... | ||
| ▲ | skeezyjefferson an hour ago | parent | prev [-] | |
> Okay they're dead jesus christ dont say that around here, youll be swamped by fanatical emacs users describing various bits of lisp theyve written over the years and what they each do. it will send you insane | ||