>I derived from a clock running at twice the speed

aah, so CFG_ENABLE_20MHZ runs cpu at 10. I was surprised you could run the bus at 20MHz with this FPGA devboard, 10 makes more sense.

As I touched on that in HaD comment this is not a good devboard :( It has terrible pinout https://github.com/wuxx/icesugar-pro/tree/master/schematic all 100 signals huddling together in the middle with only 9 ground pins among them. Very bad for signal integrity. Whats worse someone in China actually decided to sell it commercially :( Luckily you made it work.