The title is a bit misleading; it's running on an 8088-compatible CPU, and a 1 megabyte SRAM, with the FPGA containing the display adapter and drive controller, as well as the glue logic.

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II2II a day ago | parent | next [-]

A bit misleading, albeit in an impressive way. I nearly skipped the article thinking that it would be an all FPGA solution. Instead, they interfaced somewhat period correct chips: the V20 was used in XT compatibles of the era, the DAC was authentic (even if it is only a small part of the sound card), and the 1 MB RAM chip is the sort of cost cutting measure they would have used back in the day if it was available (though it would likely have been DRAM rather than SRAM). The rest being on an FPGA is certainly understandable since it was listed as an FPGA based project!

	▲	ssrc a day ago \| parent [-]
		And the FPGA is a modern day equivalent to an ULA. If they could have put all of the chips in a single programmable one, they would.

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userbinator a day ago | parent | prev | next [-]

Indeed, this should be more correctly described as an FPGA-Based IBM PC/XT Chipset.

In contrast, here's a whole 486-class PC compatible on an FPGA: https://github.com/alfikpl/ao486

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leeter 3 hours ago | parent | prev | next [-]

Honestly? I expected this to be talking about the MiSTer project FPGA core[1]. That has been tuned so it's capable of running the AREA5150 demo[2] which is an insane challenge (AFAIK the timings of the v20 break that demo). Not saying this isn't cool, but it's definitely not what I was expecting.

[1] https://github.com/MiSTer-devel/PCXT_MiSTer

[2] https://www.youtube.com/watch?v=tOmcgp99fEk

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nsxwolf a day ago | parent | prev [-]

This build demonstrate what’s actually interesting about FPGA to me. A pure implementation might as well be a software emulator. Being able to interface real chips makes this really neat.

	▲	drzaiusx11 5 hours ago \| parent \| next [-]
		The author used the lattice fpga for exactly what it was designed for: glue logic. This fpga type isn't what you'd throw a couple of cpu cores on, it's more along the lines of replacing a few dozen 74xx series logic chips. I personally enjoyed the author using modern day chip equivalents instead of soft cores on an fpga. I find the latter to be much less interesting.
	▲	gblargg 14 hours ago \| parent \| prev [-]
		Good point. I was thinking why he didn't just do the V20 etc. on the FPGA, but then a software emulator would be more flexible. Having a real hardware interface that has the right timing is something software would have to work very hard to do. Using an FPGA also forces the designer to more or less really understand the original hardware design, not just the software-visible effects as an emulator author can get away with.