it might have more to do with the difficult in separating out the contexts of the two execution streams across the rings. someone may have looked at the cost and complexity of all that accounting and said 'hell no'

Yeah, I would probably say the same. It is a bit strange to document this as part of the architecture (rather than leaving it open as a potential future microarchitectural optimization). Is there some advantage an OS has knowing that the CPU flushes the pipeline on each system call?

And given Intel’s numerous speculation related vulnerabilities, it must have been quite a rare moment!!!

Is it that difficult, add a "ring" bit to every instruction in instruction queue? Sorry I never made a OoO CPU before.