Devices on a bus architecture like RAM buses can be wired completely parallel to the same pins on the same bus master(i.e. DRAM controller), with only one separate chip select lines each. The address/data lines will not conflict so long that the component expected to speak/listen can be explicitly specified(there are other ways to specify as well).

GPU cores used in these double RAM NVIDIA GPUs are known to have that feature implemented and configurable in signed VBIOS, for some reasons. It only allows single or double RAM configurations as choices, not e.g. 4 separate lines for quadruple RAM, but double configurations can be done with a properly built and assembled PCB if you can source the cores. And there are tons of back alley trained skilled BGA repair specialists in China for mysterious reasons, so that's what they're doing.

Could it be because some of the hardware in the 4090 overlaps with the Hopper (H100) architecture?

If so, I imagine NV "fixed" this oversight with Grace Blackwell -based GPUs (5xxx series). There is too much at stake financially to leave the barn door open.

Could you nvlink several 4090s?

> And there are tons of back alley trained BGA repair specialists in China for mysterious reasons

In some countries it is cheaper to repair a phone than to buy a new one. This creates the "back alley trained BGA repair specialists".

When i was first employed in a Eastern Europe country, our computer supplier will "repair" RAM modules this way. Test was simple: insert in PC, see if it boots. It was the only place where i saw Windows 2000 crash more than Windows Me.