▲ | IshKebab 3 days ago | |
It's not just the complex encodings though, there's also the variable instruction length, and the instruction semantics that mean you need microcode. Obviously they've done an amazing job of working around it, but that adds a ton of complexity. At the very least it's going to mean you spend engineering resources on something that ARM & RISC-V don't even have to worry about. This seems a little like a Java programmer saying "garbage collection is solved". Like, yeah you've made an amazingly complicated concurrent compacting garbage collector that is really fast and certainly fast enough almost all of the time. But it's still not as fast as not doing garbage collection. If you didn't have the "we really want people to use x86 because my job depends on it" factor then why would you use CISC? | ||
▲ | exmadscientist 2 days ago | parent [-] | |
> RISC-V don't even have to worry about Except that RISC-V had to bolt on a variable-length extension, giving the worst of all possible worlds.... |