Neon has it worse, because it's harder to scale issue width then vector length.

Zen5 has four issue 512-bit ALUs, current Arm processors have been stuck at four issue 128-bit for years.

Issue width scales quadratically, while vector length mostly scales linearly.

Intel decided it is easier to rewrite all performance critical applications thrice then to go wider than four issue SIMD.

It will have to be seen if Arm is in a position to push software ro adopt SVE, but currently it looks very bleak, with much of the little SVE code thats out there just assuming 128-bit SVE, because thats what all of the hardware is.