"Breaks down" is a strong choice of words for a single, corrected bit error. ECC works as designed, and demonstrates that it does by detecting this re-occurring error. I take the confidence mostly from experience ;)

And no, as ECC UDIMM for the speed (3600MHz) I run mine at simply does not exist - it is outside of what JEDEC ratified for the DDR4 spec.

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adithyassekhar 5 days ago | parent [-]

JEDEC rated DDR4 at only 2400mhz right? And anything higher is technically over clocking?

	▲	dijit 4 days ago \| parent \| next [-]
		JEDEC has a few frequencies they support: https://www.jedec.org/standards-documents/docs/jesd79-4a DDR4-1600 (PC4-12800) DDR4-1866 (PC4-14900) DDR4-2133 (PC4-17000) DDR4-2400 (PC4-19200) DDR4-2666 (PC4-21300) DDR4-2933 (PC4-23466) DDR4-3200 (PC4-25600) (the highest supported in the DDR4 generation) What's NOT supported are some enthusiast ones that typically require more than 1.2v for example: 3600 MT/s, 4000 MT/s & 4266 MT/s
	▲	c0l0 5 days ago \| parent \| prev [-]
		JEDEC specifies rates up to 3200MT/s, what's officially referred to as DDR4-3200 (PC4-25600).