There was the dreaded AMD FX chip which was advertised as 8 core, but shared functional units. Got sued, etc.

That patent seems to be describing a dumb way to implement pipelining / speculative execution. Am I missing something?

Anyway, by my reading, it’s also similar to the Itanic, er, Itanium, where the “cores” that got combined were pipeline stages.

	▲	tgma 6 days ago \| parent [-]
		I did not read the patent (do not read patents as a matter of policy.) Was simply responding to the second paragraph that kind of reminded me of FX Bulldozer chips.