| ▲ | marshray 7 days ago | |
I doubt any CPU has more levels of address translation, caching, and other layers of memory access indirection than AMD/Intel 64 at this point. | ||
| ▲ | rwallace 7 days ago | parent [-] | |
That's an interesting question about the number of levels of address translation. Does anyone have numbers for that, and how much latency and energy an extra layer costs? | ||