▲ | immibis 2 days ago | |||||||||||||||||||||||||||||||
Pretty much every CPU has a "branch always" (it's called "branch" or "jump") and a "branch never" (it's called "nop"). The language support for this is the tricky part. | ||||||||||||||||||||||||||||||||
▲ | eigenform 2 days ago | parent | next [-] | |||||||||||||||||||||||||||||||
Think you're referring to the idea that "my compiler can know that some branch is always/never taken" and turn it into an unconditional control-flow instruction (either "always jump here", or "always continue sequentially" and don't emit anything!). But the parent comment is talking about "hinting" for branches where the compiler cannot compute this ahead of time, and the CPU is responsible for resolving it during runtime. This is usually exposed by the ISA, ie. a bit in the branch instruction encoding that tells the machine "when you encounter this instruction for the first time, the default prediction should be 'taken'." In practice, branches are usually predicted "not-taken" by default: - It's advantageous to assume that control-flow is sequential because [pre-]fetching sequentially is the easy case - It's wasteful to track the target addresses of branches in your predictor if they aren't taken at least once! | ||||||||||||||||||||||||||||||||
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▲ | zzo38computer 2 days ago | parent | prev [-] | |||||||||||||||||||||||||||||||
For "branch always", yes, but for "branch never", it is not necessarily the same as the "nop" in many instruction sets, because it would still have an operand of the same size and format of a branch instruction, although the operand is ignored. (For instruction sets with fixed size instructions, the "nop" will potentially work if it has an operand which is not used for any other purpose; the SWYM instruction on MMIX is also no operation but the operand may be used for communication with debuggers or for other stuff.) | ||||||||||||||||||||||||||||||||
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