Honestly good luck with that. I have tried DeepSeek and Claude and random pulling of registers out of LLMs butt is a thing.

What you will soon find out is that different companies are describing registers in radically different ways in their datasheets and I don't believe that LLM will be able to cope with it. If I can give you an advice, download Tasking compiler for a target processor and you will find SFD files which are essentially XML files describing registers and their bitfields. You can then add context on those SFD from the datasheet / reference manual and now you have 100% correct data with a register-first structure for LLM.

Obviously it would be better to figure where those SFD files came out to avoid IP problems. I sincerely doubt that Tasking wrote it itself, it should come from IC manufacturers because this is just distilled VHDL.

So getting these structured data instead of datasheets will more likely result in a valid answer.