The fact that we have this discussed in the open, in such a transparent way, is great. HP was confident they could maintain their lead while talking about methodology and design. The marketing value of open communication to showcase their leadership (and to enable engineers using their products to learn to do similar things outside of the test space) was evident.

tverbeure 3 days ago | parent [-]

If you haven't already, you should also check out the HP Journal edition that was dedicated to this counter: http://www.hparchive.com/Journals/Low-Resolution/HPJ-1978-08....

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mlyle 2 days ago | parent [-]

This is really great.

Bummed I didn't see it before. I made a really precise timebase and a fairly precise interval counter a decade ago using pretty different techniques (ECL and staggered delay lines and a lot of calibration). It would have been nice to know more about these techniques.

	▲	tverbeure 2 days ago \| parent [-]
		I've been wondering if it's possible to recreate this with today's technology. The HP implementation uses a custom ASIC with very fast transistors, so it's not obvious. https://febo.com/pipermail/time-nuts_lists.febo.com/2025-Jul... If you want to make your own interval counter today, the to-go-to method is to use a TDC7200 chip. If that's not good enough, you can also look at the schematics of an SRS SR620 time interval counter. It has a similar 25ps precision and uses an ADC to interpolate between samples of a 90 MHz clock. These kind of ADCs weren't available in 1978.