▲ | burnt-resistor 2 days ago | |
Barely. x86 is fading. Arm doesn't do this in GCC or Clang. > Shorter usually means faster It depends, so spouting generalities doesn't mean anything. Instruction cache line filling vs. cycle reduction vs. reservation station ordering is typically a compiler constraints optimization problem(s). | ||
▲ | userbinator 2 days ago | parent [-] | |
Arm doesn't do this in GCC or Clang. Because Arm64 has a zero register, and Arm32 has small immediates, and all instructions are uniformly long. |